Recently, demand for high speed semiconductor devices, scaling-down of wiring patterns, and high integration have spurred a reduction in inter-wiring capacitance, enhancement of conductivity of wirings, and enhancement of electromigration tolerance. As a technology for meeting the above requirements, a copper (Cu) multilayer wiring technology has been drawing attention, in which a film of a low dielectric constant (a low-k film) as an interlayer insulating film, and copper as a wiring material which has conductivity higher than that of aluminum (Al) or tungsten (W) and good electromigration tolerance are used.
As one of the methods of forming a copper wiring, a technology of first forming a low-k film on a semiconductor wafer (hereinafter, simply referred to as “wafer”) as a substrate to be processed, forming a trench or a hole in the low-k film, forming a barrier layer made of Ta, TaN, Ti, or the like on an inner wall thereof through physical vapor deposition (PVD) represented by sputtering, forming a copper seed layer thereon through PVD, and performing copper plating thereon to bury the trench or the hole has been known.
However, since the design rule of semiconductor devices has become increasingly scaled down, it is difficult to form a copper seed layer within a trench or a hole through PVD having essentially low step coverage. Thus, a method of forming a ruthenium film as a seed layer on a barrier layer through chemical vapor deposition (CVD) and forming a copper film thereon has been proposed. Further, forming a ruthenium film through atomic layer deposition (ALD) capable of obtaining better step coverage has also been considered. Moreover, forming the barrier layer through CVD or ALD has also been considered.
In the case of forming the seed layer or the barrier layer through CVD or ALD, an organic metal compound in which a metal atom is bonded with an organic group is normally used. However, the use of an organic metal compound leads to a problem that components other than a metal easily remain in a film. Thus, using metal carbonyl is discussed as an organic metal compound raw material since it allows for obtaining a film with less impurities and the only organic ligand thereof is CO. A technology of forming a tungsten film as a barrier layer using W(CO)6 and a technology of forming a ruthenium film as a seed layer using Ru3(CO)12 have been known.
However, in a normal film forming method in which a film is formed using metal carbonyl, a film thickness in a central portion of a wafer tends to be greater while a film thickness in a peripheral portion tends to be smaller, resulting in low in-plane uniformity. For this reason, a method of installing a baffle plate having a gas outlet in a position corresponding to a periphery of a semiconductor wafer, further installing an annular inner partition wall surrounding a processing space within a processing container, and supplying a film forming material gas from the gas outlet installed in the periphery of the baffle plate toward a region positioned radially-outwardly than an outer circumferential end of the semiconductor wafer loaded on a loading table has been proposed in the related art.
When scaling-down of semiconductor devices further progresses and it becomes an era of post-22-nm node technology, a uniformly formed barrier layer or a seed layer with an extremely small film thickness of 2 nm or less will be required. However, even when the technology of the related art is used, in-plane uniformity of a desired film thickness may not be obtained due to the little temperature difference between a central portion and a peripheral portion of a wafer. Consequently, a different way or approach to secure the desired in-plane uniformity is required.